December 2, 2010
4:30 PM EST (1:30 PM PST)
Junction and Schottky diodes in nano-scale CMOS can have cut-off frequencies in excess of Terahertz. In fact, cut-off frequencies of 1.5 and 2 THz for shallow trench isolation (STS) separated and polysilicon gate separated (PGS) Schottky diode structures have been demonstrated in a 130-nm foundry logic CMOS technology. Fabrication of these diodes requires no process modifications. The Schottky diodes have been utilized to demonstrate a 270-GHz AM detector and a frequency doubler that generates -1 dBm 125-GHz signal. The frequency doubler has ~10% efficiency. It should be possible to build detectors and frequency multipliers operating at 500 to 600 GHz using these diodes. Anti-parallel diodes with cut-off frequency greater than 600 GHz using silicide-to-n and silicide-to-p diodes that can be used to build harmonic mixers operating ~300 GHz have also been demonstrated. P-n junction diodes have ~2-3 times lower capacitance for given on-resistance than NMOS transistors in 130-nm CMOS technology. The diodes also have ~3-4 times higher breakdown voltages. The diode is used to demonstrate a 60-GHz transmit/receive switch that achieves 2.1 and 3.0 dB in transmit and receive modes and IP1dB of greater than 18dBm. The insertion loss is comparable to the best in CMOS including that fabricated in 90-nm CMOS and power handling capability (IP1dB) is more than 3dB better. These suggest that diodes fabricated in CMOS can enable circuits with better performance than some transistor circuits, and can be used to extend the operating frequency of silicon integrated circuits beyond that limited by the cut-off and unity maximum available power gain frequencies of transistors. These also raise a question on how much the performance of these diodes and circuits can be improved if the structures were scaled and some process steps were modified or added.
Kenneth O
University of Texas, Dallas
Kenneth O received his S.B, S.M, and Ph.D degrees in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology, Cambridge, MA in 1984, 1984, and 1989, respectively. From 1989 to 1994, Dr. O worked at Analog Devices Inc. developing sub-micron CMOS processes for mixed signal applications, and high speed bipolar and BiCMOS processes. He has been a professor at the University of Florida, Gainesville from 1994 to 2009. He is currently the director of Texas Analog Center of Excellenc and TI Distinguished Chair of Analog Circuits and Systems at University of Texas at Dallas. His research group is developing circuits and components required to implement analog and digital systems operating between 1 and THz using silicon IC technologies. He was the general chair of the 2001 IEEE Bipolar/BiCMOS Circuits and Technology Meeting. Dr. O has also served as an associate editor for IEEE Transaction on Electron Devices from 1999 to 2001. Dr. O was elected to the Adcom of IEEE Solid-State Circuits Society in 2009. He has authored and co-authored ~180 journal and conference publications, as well as holding nine patents. Dr. O has received 1996 NSF Early Career Development Award.