Akintunde Ibitayo (Tayo) Akinwande earned the BSc in 1978 from the University of Ife, Nigeria; and the MS and Ph.D degrees in 1981 and 1986, respectively, from Stanford University. He joined the Department of Electrical Engineering and Computer Science at MIT in January 1995 as an Associate Professor. Prior to joining MIT, he was a staff scientist at the Honeywell Technology Center in Bloomington, MN. There he pioneered the development of thin-film-edge Field Emitter Arrays for RF Micro-Triode Power Amplifiers and Flat Panel Displays and demonstrated the feasibility of using the thin-film-edge FEA for these applications. He adapted the thin-film edge for the fabrication of a high brightness lamp that can be used as a backlight for avionic active matrix liquid crystal displays (AMLCDs) that are sunlight readable and can adapt to any environmental conditions. The result is a very bright and diffuse light source. In 1989, he developed the first viable Complementary GaAs Heterostructure FET technology (a GaAs analog of CMOS) that demonstrated the lowest power-delay ever reported for a semiconductor technology (1.5 fJ) at a gate length of 1 µm. A 4K SRAM operating at 250 MHz with low power dissipation was demonstrated. He also developed GaAs heterostructure FET technology for high speed digital signal processing. He demonstrated a DFT chipset consisting of a 500 MHz Complex Multiplier and a 250 MHz Butterfly Adder. These are the highest speed LSI circuits ever reported at that time (1988). Other research accomplishments include demonstration of very low threshold GaAs VCSEL and high brightness UV LEDs. In 1989, he received the Sweatt Award, Honeywell's highest technical award for his work on the DFT processor chip set.

James A. Bain is a Professor of Electrical and Computer Engineering at CMU, and the Associate Director of the Data Storage Systems Center. He received his BS (1988) in Materials Science and Engineering from the University of Pennsylvania and his MS (1991) and PhD (1993) in Materials Science and Engineering from Stanford. Professor Bain’s expertise is in the areas of materials and devices for non-volatile information storage. Specifically, he is interested in localized energy delivery to precipitate reversible, non-volatile change in materials, which can be used for information storage.

Shawn Blanton is a professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University where he is the associate director of the Center for Silicon System Implementation (CSSI). He received the Bachelor's degree in engineering from Calvin College in 1987, a Master's degree in Electrical Engineering in 1989 from the University of Arizona, and a Ph.D. degree in Computer Science and Engineering from the University of Michigan, Ann Arbor in 1995. As co-director of the Carnegie Mellon Laboratory for Integrated Systems TEST (CM-LIST), he is focused on developing new test and diagnosis methods for measuring the various sources of yield loss for heterogeneous systems.

Duane S. Boning received the S.B. degrees in electrical engineering and in computer science in 1984, and the S.M. and Ph.D. degrees in electrical engineering in 1986 and 1991, respectively, all from the Massachusetts Institute of Technology. He was an NSF Fellow from 1984 to 1989, and an Intel Graduate Fellow in 1990. From 1991 to 1993 he was a Member Technical Staff at the Texas Instruments Semiconductor Process and Design Center in Dallas, Texas, where he worked on semiconductor process representation, process/device simulation tool integration, and statistical modeling and optimization. He is a Fellow of the IEEE, is Editor in Chief for the IEEE Transactions on Semiconductor Manufacturing, and has served as chairman of the CFI/Technology CAD Framework Semiconductor Process Representation Working Group. He is a member of the IEEE, Electrochemical Society, Eta Kappa Nu, Tau Beta Pi, Materials Research Society, Sigma Xi, and the Association of Computing Machinery.

Stephen Boyd is the Samsung Professor of Engineering and Professor of Electrical Engineering in the Information Systems Laboratory at Stanford University. He received the A.B. degree in Mathematics from Harvard University in 1980, and the Ph.D. in Electrical Engineering and Computer Science from the University of California, Berkeley, in 1985, and then joined the faculty at Stanford. His current research focus is on convex optimization applications in control, signal processing, and circuit design. He is a recipient of the John R. Ragazzini Award, the Donald P. Eckman Award from the IEEE Control Systems Society, the Perrin Award for Undergraduate Teaching, and the Presidential Young Investigator Award. He is a Fellow of the IEEE Control Systems Society and an IEEE Distinguished Lecturer.

Bob Brodersen received his BS in Electrical Engineering and Mathematics from California State Polytechnic University in 1966;  the Engineering and MS degrees from MIT in 1968; and his PhD from MIT in 1972. He then spent three years with the Central Research Laboratory at Texas Instruments. He joined the Electrical Engineering and Computer Science faculty at the University of California, Berkeley in 1976, where he now holds the first John Whinnery Endowed Chair and serves as Co-Scientific Director of the Berkeley Wireless Research Center.  He has won best paper awards for several journal and conference papers in the areas of integrated circuit design, CAD and communications, including the W.G. Baker Award in 1979 for Best Paper in all the IEEE Journals and Transactions. He is a Fellow of the IEEE and was co-recipient of the IEEE Morris K. Liebmann Award for Outstanding Emerging Technology in 1983. He received Technical Achievement Awards from the IEEE Circuits and Systems Society, the Signal Processing Society, and the ACM Special Interest Group in Mobile Computing.  He has received the IEEE Solid State Circuits Award, an honorary doctorate from the University of Lund, Sweden, the Millennium Award from the Circuits and Systems Society, and the Golden Jubilee Award from the IEEE. In 2001 he was awarded the Lewis Winner Award for outstanding paper in the IEEE International Solid-State Circuits Conference and in 2003 was given an award for being one of the top ten contributors over the 50 years of that conference. He was elected a member of the National Academy of Engineering in 1988. His research is focused in the areas of low-power design and wireless communications and the CAD tools necessary to support these activities. 

Vladimir Bulovic joined the faculty of MIT in July 2000 as an Assistant Professor of Electrical Engineering and Computer Science. His research interests include studies of physical properties of organic and organic/inorganic nanodot composite thin films and structures, and development of novel optoelectronic organic and hybrid nano-scale devices. Prior to joining MIT, he was a Senior Scientist and Project Head of Strategic Technology Development at Universal Display Corporation (UDC). At UDC he worked on the application of organic materials to LEDs for full color flat panel displays and thin film photovoltaics for solar cell and detector applications. His work resulted in development of OLED backlights, pixilated arrays of stacked OLEDs, and improved performance of phosphorescent OLEDs. Prior to joining UDC he worked in Princeton's POEM Center as a graduate researcher (1993-1998) and research associate (1998-1999). At Princeton, Prof. Bulovic participated in a series of projects examining optical and electrical properties of vacuum deposited amorphous and crystalline molecular organic thin films and devices. His work resulted in development of OLED technologies such as transparent, inverted, and stacked OLEDs, demonstration of the first optically pumped organic semiconductor lasers, and understanding of photogeneration in organic photovoltaic devices, microcavity effects in luminescent devices, and the solid state solvation effects in polar organic media. From 1991-1993, Prof. Bulovic worked at Columbia University's Microelectronics Sciences Laboratory, where for his M.S. degree he examined image-potential states and resonances on metal surfaces utilizing non-linear two-photon photoemission spectroscopy. Prof. Bulovic graduated from Princeton University with a B.S.E. (1991), M.A. (1995), and Ph.D. (1998) in Electrical Engineering. He is a member of MRS, APS, and TMS, has authored over 35 papers, has 8 issued patents, and is a co-inventor on over 20 additional patent filings in the areas of organic LEDs, lasers, and photodetectors.

Benton Highsmith Calhoun received his B.S. degree in electrical engineering with a concentration in computer science from the University of Virginia, Charlottesville, in 2000. He received the M.S. degree and Ph.D. degree in electrical engineering from MIT 2002 and 2006, respectively. In January 2006, he joined the faculty at the University of Virginia as an Assistant Professor in the Electrical and Computer Engineering Department. His research interests include low-power digital circuit design, sub-threshold digital circuits, SRAM design for end-of-the-roadmap silicon, variation-tolerant circuit design methodologies, and low-energy electronics for medical applications. Dr. Calhoun is a co-author of Sub-threshold Design for Ultra Low-Power Systems . He serves on the Technical Program Committee for the International Symposium on Low Power Electronics and Design (ISLPED) and is a member of the IEEE.

Yu (Kevin) Cao is an asst. professor in EE in the Ira A. Fulton School of Engineering at Arizona State University. Cao joined ASU in 2004 after obtaining a a PhD in EE from the University of California-Berkeley. In August 2006 Cao received a National Science Foundation Career Award, which will support his research in the use of nanoscale silicon transistors and components from other emerging technologies, such as the carbon nanotube, to devise more reliable nanoelectronics systems. Also in 2006, he received the IBM Faculty Award as part of a global program that strives to develop collaborations between IBM researchers and faculty at leading universities.

L. Richard Carley is The ST Microelectronics Professor of Engineering in the Electrical and Computer Engineering Department at Carnegie Mellon University (CMU). He received the S.B. in 1976, M.S. in 1978, and Ph.D. 84, all from the department of Electrical Engineering and Computer Science at MIT. He joined Carnegie Mellon University in 1984 and was promoted to Full Professor of Electrical and Computer Engineering in 1992. He received the ST Microelectronics Chair in Engineering in 2001. He received an NSF Presidential Young Investigator Award in 1985, a Best Technical Paper Award at the 1987 Design Automation Conference, and a Best Panel Award at the 1993 ISSCC, and was made an IEEE Fellow in 1997. He holds 12 patents and has authored or co-authored over 160 technical papers. His research interests include: (1) the design of analog circuits and systems for mixed-signal ICs and System-On-a-Chip (SOC) ICs - especially data converters, signal conditioning circuits, and communications / RF circuits, (2) development of CAD Tools to support the analog IC design flow, and (3) design of integrated microelectromechanical systems and control/sensing electronics. Dr. Carley has received industry support from Analog Devices, GE, Lucent Microelectronics, the Semiconductor Research Corporation, and Texas Instruments. His consulting activities focus on analog and mixed-signal IC design and CAD tools with companies such as Analog Devices, Ampex, Quantum, Teradyne, Texas Instruments, Sony, Kodak, Maxtor, Cadence and Analog Devices. In 1997 he cofounded Neolinear, an Analog IC CAD Tool company acquired by Cadence in 2004. In 2001 he cofounded IC Mechanics.

Anantha Chandrakasan is Joseph F. and Nancy P. Keithley Professor of Electrical Engineering at MIT. His works on the design and implementation of ultra-low-power digital integrated circuits in nanometer scale CMOS. He is a co-author or co-editor of five books. He has received a number of IEEE awards. He was the technical program chair of ISSCC 2003 and is currently the Technology Directions Chair for ISSCC 2007.

W. Rhett Davis received B.S. degrees in electrical and computer engineering from North Carolina State University, Raleigh, in 1994 and M.S. and Ph.D. degrees in electrical engineering from the University of California at Berkeley in 1997 and 2002. He has worked briefly with Hewlett-Packard (now Agilent) in Boeblingen, Germany and Chameleon Systems in San Jose, California. Since 2002, he has been an Assistant Professor of Electrical and Computer Engineering at North Carolina State University. His research interests are centered on developing methodologies, CAD tools, and circuits for systems-on-chip in emerging technologies. His interests include 3D IC design and low-power and high-performance circuit design for digital signal-processing and embedded systems.

Joel L. Dawson received his Ph.D. in electrical engineering from Stanford University in September of 2003. His current work is on advanced architectures for wireless transceivers, particularly those suited to deep-submicron CMOS integration. He also works on applying mathematical optimization to the design of large analog systems.

Bill Eisenstadt received his doctorate degree in Electrical Engineering from Stanford University in 1986. He conducts research in the areas of mixed-signal/RF embedded IC testing, high-speed I/O characterization, BIST, and differential s-parameter characterization of integrated circuit devices, packages, and interconnect. He was Technical Program Co-Chair of the 4th Workshop on Test of Wireless Circuits and Systems, 2005 and Technical Program Chair of the 64th ARFTG, Dec 2004 (Automatic RF Test Group), conferences. Prof. Eisenstadt serves on the ARFTG Executive Committee, ISCAS Analog Signal Processing Technical Committee and the Wireless Test Workshop Executive Committee. He has over 25 years experience in IC design and test. Dr. Eisenstadt received the NSF Presidential Young Investigator Award in 1985. He has over 110 refereed conference and journal publications and co-authored one book concerned with microwave circuit design.

Azita Emami-Neyestanak received the PhD in Electrical Engineering from Stanford. She is currently an Assistant Professor of Electrical Engineering at Caltech. Her area of research is mixed-signal circuits and systems design, focusing on high-speed electrical and optical interconnects, efficient timing and clock recovery architectures, and developing robust circuits and systems in highly-scaled technologies. She has developed a number of novel transceivers and CDR techniques for electrical and optical links.

Babak Falsafi graduated Summa Cum Laude from State University of New York at Buffalo where he received a B.S. in Computer Sciences and a B.S. in Electrical and Computer Engineering in 1990. He went on to pursue a graduate degree at University of Wisconsin where he received an M.S. and a Ph.D. in Computer Science in 1991 and 1998 respectively. He is an Associate Professor in the Department of Electrical and Computer Engineering at Carnegie Mellon, and a co-director of the Computer Architecture Lab at Carnegie Mellon (www.ece.cmu.edu/CALCM). His research (www.ece.cmu.edu/~impetus) targets architectures to break the memory wall, architectural support for gigascale integration, and analytic and simulation tools for computer system performance evaluation. He has made a number of contributions to computer system design and evaluation including a result (with T. N. Vijaykumar) indicating that hardware speculation can bridge the performance gap among memory consistency models. He is a recipient of an NSF CAREER award in 2000 and IBM Faculty Partnership Awards in 2001, 2003 and 2004, and an Alfred P. Sloan Research Fellowship in 2004. You may contact him at babak@cmu.edu (http://www.ece.cmu.edu/~babak). He is a member of IEEE and ACM.

Gary Fedder is the Howard M. Wilkoff Professor of Electrical and Computer Engineering (ECE) and the Director of the Institute for Complex Engineered Systems (ICES) at Carnegie Mellon University. He joined CMU in 1994 with a joint appointment in ECE and the Robotics Institute. He received the B.S. and M.S. degrees in electrical engineering from MIT in 1982 and 1984, respectively. From 1984 to 1989, he worked at Hewlett-Packard on a VLSI integrated-circuit test system and on modeling printed-circuit-board interconnects for high-speed computers. He completed his PhD at Berkeley in 1994. His thesis resulted in the first microstructure with sigma-delta multi-mode electrostatic servo control and the AIME Electronic Materials Society Ross Tucker Award. His research centers around the design and modeling of microsensors and microactuators and the fabrication of integrated MEMS with electronic circuits using conventional CMOS processing, a method pioneered by his research group. He has demonstrated that this affordable approach makes it possible to build complex systems-on-chip for applications such as accelerometers, mirror laser scanners, probe micromanipulators, chemical sensors, and radio-frequency resonant mixer filters. In prior work within C2S2, he worked on RF MEMS tunable capacitors. He is most recently collaborating on a MEMS-actuated probe-tip architecture for programming resistance-change vias within sub-90nm ICs. He currently serves as a subject editor for the IEEE/ASME Journal of Microelectromechanical Systems, is on the editorial boards of the IoP /Journal of Micromechanics and Microengineering/ and /IET Micro & Nano Letters/, and is co-editor of the Wiley-VCH /Advanced Micro- and Nanosystems/ book series. He served as general co-chair of the 2005 IEEE MEMS Conference. In 1999, he led the team that won third place in the National SRC Copper Design Contest. He received an NSF Career Award, and the College of Engineering George Tallman Ladd Research Award, both in 1996. He has contributed to over 100 research publications and several patents in the MEMS area.

Donhee Ham is an Associate Professor of electrical engineering, Division of Engineering and Applied Sciences, Harvard University. He received the B.S. degree in physics in 1996 from Seoul National University, Korea, graduating with Presidential Honor atop the Natural Science College, and the PhD degree in electrical engineering from California Institute of Technology (Caltech) in 2002, winning the Charles Wilts Doctoral Thesis Prize for outstanding PhD research in electrical engineering. He was the recipient of the Caltech Li Ming Scholarship and IBM Graduate Research Fellowship. He was also the recipient of the 2003 IBM Faculty Partnership Award. He shared Harvard's Hoopes prize (best senior thesis award) in 2003 with Mr. William Andress. His work experiences also include Laser Interferometer Gravitational Wave Observatory (LIGO), Pasadena, CA, 1997/98, IBM T. J. Watson Research Center, NY, 2000, IEEE conference technical program committees including International Solid-State Circuits Conference, and industry/government technical advisory positions on subjects including high-speed electronics and future electronics technologies in the post-50nm era. His current research focus is on (1) RF & microwave ICs, (2) nanoscale quantum-effect devices for GHz & THz circuits, and (3) soliton & nonlinear wave electronics. His research also examines (4) biological laboratories on an IC. Donhee Ham's research details can be found at http://www.deas.harvard.edu/~donhee.

James C. Hoe is an Associate Professor of Electrical and Computer Engineering at Carnegie Mellon University with a courtesy appointment in the Computer Science Department. He received his Ph.D. in EECS from MIT in 2000 and his B.S. in EECS from UC Berkeley in 1992. He co-directs the Computer Architecture Lab at CMU, and is affiliated with Center for Silicon System Implementation and the CyLab. His research interests are in computer architecture and high-level hardware description and synthesis, with an emphasis on processor microarchitectures and parallel computing systems. He is also interested in applying architectural description and synthesis technologies to the study and construction of computer hardware. His current research areas include: operation-centric hardware description and synthesis framework, secure and reliable processor architectures, a mathematical approach to high-level dsp hardware synthesis and optimization, and microarchitectural prototyping and simulation.

Mark A. Horowitz is the Yahoo! Founders Professor of Electrical Engineering and Computer Science and Director of the Computer Systems Laboratory at Stanford University. He received his BS and MS degrees in EE from MIT in 1978 and the PhD from Stanford in 1984. Since 1984 he has been a professor at Stanford working in the area of digital integrated circuit design. While at Stanford he has led a number of processor designs including MIPS-X, one of the first processors to include an on-chip instruction cache, Torch, a statically-scheduled, superscalar processor, and Flash, a flexible DSM machine. He has also worked in a number of other chip design areas including high-speed memory design, high-bandwidth interfaces, and fast floating point. In 1990 he took leave from Stanford to help start Rambus Inc, a company designing high-bandwidth memory interface technology, and continues to serve as Chief Scientist. He received the Most Influential Paper Award from the International Symposium on Computer Architecture, the 2003 Jack Kilby Outstanding Paper Award from the ISSCC, and the 2006 IEEE Solid State Circuits Technical Field Award. He is a Fellow of the IEEE and ACM.

Wen-mei Hwu is the Walter J. (“Jerry”) Sanders III-Advanced Micro Devices Endowed Chair in Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign, where he is also a Research Professor in the Coordinated Science Laboratory. He received his PhD in Computer Science from the University of California, Berkeley. His research interest is in the area of architecture, implementation, and software for high-performance computer systems. He is the director of the OpenIMPACT project, which has delivered new compiler and computer architecture technologies to the computer industry since 1987. He also serves as the Soft Systems Theme leader of the MARCO/DARPA Gigascale Silicon Research Center (GSRC). He has received many “best paper” awards, as well as the Eta Kappa Nu Outstanding Young Electrical Engineer Award, the Xerox Award for Faculty Research, the University Scholar Award of the University of Illinois, the Eta Kappa Nu Holmes MacDonald Outstanding Teaching Award, the ACM SigArch Maurice Wilkes Award, the ACM Grace M. Hopper Award, the 2002 ComputerWorld Honors Archive Medal, and the 2006 Most Influential Paper Award from ISCA for his 1991 publication, "IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors," He is a fellow of IEEE and of the ACM.

Tsu-Jae King (Liu) is a Professor in the Electrical Engineering and Computer Sciences Department, and is affiliated with the Applied Science & Technology Graduate group and the Nanoscale Science and Engineering Graduate group, at the University of California, Berkeley. She also serves as the Director of the UC-Berkeley Microfabrication Laboratory. She holds BS (1984), MS (1986) and PhD degrees (1994) in Electrical Engineering from Stanford University. Her awards include the Ross M. Tucker AIME Electronics Materials Award (1992), an NSF CAREER Award (1998), the DARPA Significant Technical Achievement Award (2000), Semiconductor Research Corporation Inventor Recognition Awards (2000,2003, 2005), an Outstanding Teaching Award for the EE Division of the EECS Department (2003), a MARCO Inventor Recognition Award (2006), and the National Academy of Engineering Lillian M. Gilbreth Lectureship (2006). She is co-inventor of the FinFET, and her expertise is in advanced transistor designs, materials, and process technology for deeply scaled CMOS logic and memory devices.

Christos Kosyrakis is an Assistant Professor in the Computer Systems Laboratory and the Departments of Electrical Engineering and Computer Science at Stanford University. He joined Stanford in 2002 after receiving a PhD in Computer Science from U.C. Berkeley. He completed his undergraduate studies at the University of Crete in Greece. His research is in the area of computer systems architecture with an emphasis on hardware, compilers, and programming models for parallel computer systems. His current projects include transactional memory systems, data-parallel processors, polymorphic architectures, and power management for server systems. He is the recipient of an IBM Faculty Award (2006), an NSF Career Award (2006) and an Okawa Foundation Research Grant (2005).

Hsien-Hsin Sean Lee is an Assistant Professor of the School of Electrical and Computer Engineering at Georgia Institute of Technology. He received his PhD degree in computer science and engineering from the University of Michigan at Ann Arbor. His research interests include computer architecture, design support and tools for 3D ICs, low-power VLSI, and information security. Prior to joining academia, he was a senior processor architect at Intel Corporation and later the architecture manager of StarCore DSP Technology Center, a joint design center of Agere systems and Motorola Inc. Dr. Lee's doctoral thesis was awarded the Horace H. Rackham School Distinguished Dissertation Award at the University of Michigan. He has co-authored three papers that won Best Paper Awards at MICRO-33, CASES-04, and IBM PAC^2. Dr. Lee received the Department of Energy Early CAREER PI Award in 2005 and was named the recipient of the 2006 ECE Outstanding Jr. Faculty Member Award at Georgia Tech. Dr. Lee holds 4 U.S. patents and is a member of Tau Beta Pi, the ACM and the IEEE.

Harry (Hae-Seung) Lee received the B.S. and the M.S. degrees in Electronic Engineering from Seoul National University, Korea in 1978 and 1980 respectively. He received the Ph.D. degree in electrical engineering from the University of California, Berkeley, in 1984, where he developed self-calibration techniques for A/D converters. In 1980, he was a member of the Technical Staff in the Department of Mechanical Engineering at the Korean Institute of Science and Technology, Seoul, where he was involved in the development of alternative energy sources. Since 1984, he has been with the Department of Electrical Engineering and Computer Science at the MIT Microsystems Technology Laboratories, where he is now a Professor. Since 1985, he has acted as Consultant to Analog Devices, Inc. Prof. Lee is a recipient of the 1988 Presidential Young Investigators' Award. He has served on a number of technical program committees for various IEEE conferences, including the International Electron Devices Meeting, the International Solid-State Circuits Conference, the Custom Integrated Circuits Conference, and the IEEE Symposium on VLSI Circuits. From 1992 to 1994 he was an associate editor for the IEEE Journal of Solid-State Circuits. Prof. Lee is a Fellow in IEEE and has been a member since 1988. Prof. Lee has been on the ISSCC Program Committee in 1998, 1999, 2000. He is the Director for MIT's Center for Integrated Circuits and Systems. Prof. Lee is also the Area III Chair. His research interests are in the area of analog integrated circuits, early vision circuits, fabrication technologies, and solid-state sensors. (hslee@mtl.mit.edu)

Peng Li is an assistant professor of Electrical and Computer Engineering at Texas A&M University. He received the Ph.D. degree in Electrical and Computer Engineering from Carnegie Mellon University in 2003. After completing a brief post-doctoral research experience at CMU, he joined the faculty at Texas A&M in August 2004. He worked at the IBM Austin Research Laboratories in the summer of 2002. Li's research interests lie in the general area of VLSI Design and electronic design automation with emphasis on circuit simulation, analog & mixed-signal CAD and test, RF simulation algorithms, interconnect modeling, timing analysis, IC thermal issues and power delivery. He received inventor recognition awards from the Semiconductor Research Corporation (SRC) in 2001 and 2004 and from the Microelectronics Advanced Research Corporation (MARCO) in 2006. In 2003 he received a Best Paper Award from the 40th ACM/IEEE Design Automation Conference. Li is serving the technical program committees of ACM/IEEE International Conference on CAD, IEEE International Symposium on Quality Electronic Design, IEEE International Symposium on Circuits and Systems and the Ph.D. Forum at the Design Automation Conference.

Sung Kyu Lim completed his undergraduate, master’s and PhD degrees in computer science from UCLA in 1994, 1997, and 2000, respectively. From 2000 to 2001, he was a post-doctoral scholar at UCLA, and a senior engineer at Aplus Design Technologies, which later became a part of Magma Design Automation, Inc. He joined the School of Electrical and Computer Engineering at Georgia Tech as an assistant professor and the College of Computing as an adjunct assistant professor. He received the Design Automation Conference (DAC) Graduate Scholarship in 2003 and the National Science Foundation Faculty Early Career Development (CAREER) Award in 2006. He has been on the Advisory Board of the ACM Special Interest Group on Design Automation (SIGDA) since 2003. He served as a guest editor for ACM Transactions on Design Automation of Electronic Systems (TODAES). He has served on the Technical Program Committee of several ACM and IEEE conferences on electronic design automation. His research focus is on physical design automation for 3-D circuits, 3-D system-on-packages, microarchitectural physical planning, and field-programmable analog arrays.

Gabriel H. Loh is an Assistant Professor in the Center for Experimental Research in Computer Systems in the College of Computing at Georgia Tech. He joined Georgia Tech after completing the PhD in Computer Science at Yale University in 2002. For the '03-'04 academic year, he was on leave at Intel's Microarchitecture Research Laboratory (MRL) in Austin, TX. His research is in computer architecture, with an emphasis on high-performance processor microarchitecture. He is interested in making current and future processors faster, more powerful and more efficient. Current projects include working on High-Performance High-Efficiency Microarchitectures, 3D Microarchitectures, and other "traditional" Microarchitecture techniques.

Ken Mai is an assistant professor of Electrical and Computer Engineering at Carnegie Mellon University. He joined CMU in 2005 after completing the PhD in EE in 2005, the MS in EE in 1997, and his BS in 1993, all from Stanford University. His research interest is the circuit design of efficient, high-performance digital blocks (i.e., memories and functional units) in future-generation technologies. He is also interested in building tools to export VLSI-level design information and constraints to architectural-level design.

Wociech Maly has been with CMU since 1983, where he is Whitaker Professor of ECE. His research interests have been focused on the interfaces between VLSI design, testing and manufacturing with stress on the stochastic nature of phenomena relating these domains. He pioneered many of today’s statistical process simulation, layout-oriented yield modeling, and defect-based approaches to fault modeling (including inductive fault analysis) as well as new design for manufacturability strategies and defect/quality oriented testing methodologies.

Rajit Manohar is an Associate Professor of Electrical and Computer Engineering at Cornell. His research expertise includes asynchronous circuits and architectures for reduced power and improved performance. His group developed a high-performance FPGA architecture, and a low power event-driven processor for sensor networks. His current interests include reconfigurable systems, variation tolerant circuits, circuit and micro-architecture techniques for soft errors, and the synchronous-asynchronous boundary.

Dejan Markovic is an Assistant Professor of Electrical Engineering at UCLA. He completed the Ph.D. degree in 2006 at the University of California, Berkeley, where he was a member of the Berkeley Wireless Research Center, under the leadership of Professors Bob Brodersen and Bora Nikolic. He completed the BS degree at the University of Belgrade, Yugoslavia, and the MS degree at the University of California, Berkeley. His research focuses on optimization and rapid prototyping of power limited digital systems, with emphasis on the next generation wireless communication devices. Topics include digital integrated circuits, VLSI signal processing architectures, optimization methods, and supporting EDA environments.

Teresa H.-Y. Meng is the Reid Weaver Dennis Professor of Electrical Engineering at Stanford University, with a courtesy appointment in the Dept. of Computer Science. She completed her PhD in 1988 at UC-Berkeley. She is a Fellow of the IEEE, and a recipient of the Distinguished Lecturer Award from the IEEE Signal Processing Society, the CIO 20/20 Vision Award, the Best Paper Award of the IEEE Signal Processing Society, and the NSF Presidential Young Investigator Award. She was named Innovator of the Year by the MIT Sloan School eBA. Her current research activities include circuit optimization, neural signal processing, and plastic computing.

Subhasish Mitra is an Assistant Professor in the Electrical Engineering Department of Stanford University. Prior to joining Stanford he was a Principal Engineer at Intel Corporation. His research interests include robust system design, VLSI design and test, fault-tolerant computing and design in emerging nanotechnologies. He has published more than 70 technical papers and his research has seen wide-spread proliferation in the industry. His X-Compact technique for test compression has been used by more than 40 Intel products, and is supported by major CAD tools. He received Ph.D. in Electrical Engineering from Stanford University.

Boris Murmann is an Assistant Professor in the Department of Electrical Engineering at Stanford University. He received the Dipl.-Ing. (FH) degree in communications engineering from Fachhochschule Dieburg, Germany, in 1994 and the M.S. degree in electrical engineering from Santa Clara University, Santa Clara, CA, in 1999. In 2003, he received the Ph.D. degree in electrical engineering from the University of California at Berkeley, CA. From 1994 to 1997, he was with Neutron Mikrolektronik GmbH, Hanau, Germany, where he developed low-power and smart-power ASICs in automotive CMOS technology. During 2001 and 2002, he held internship positions with the High-Speed Converter Group at Analog Devices, Wilmington, MA. Since 2004, he is an Assistant Professor in the Department of Electrical Engineering, Stanford, CA. Prof. Murmann's research is in the area of mixed-signal integrated circuits, with an emphasis on data converters and sensor interface circuits. In addition, he is interested in cross-layer optimization of electronic systems and circuit design in post-CMOS and organic device technologies. Dr. Murmann was a co-recipient of the Meritorious Paper Award at the 2005 US Government Microcircuit & Critical Technology Conference. He currently serves as a member of the International Solid-State-Circuits Conference (ISSCC) program committee.

Ali M. Niknejad received the Ph.D. degree in electrical engineering from the University of California, Berkeley, in 2000. He spent two years in industry working on RF CMOS power amplifiers. He is currently an assistant professor in the EECS department at UC Berkeley and co-director of the Berkeley Wireless Research Center and the BSIM Research Group. He served as an associate editor of the IEEE JSSC and is now serving on the TPC for CICC and ISSCC. Prof. Niknejad was co-recipient of the Outstanding Technology Directions Paper at ISSCC 2004 for co-developing a modeling approach for devices up to 65 GHz.

Borivoje Nikolić is an Associate Professor in the Department of Electrical Engineering and Computer Sciences at the University of California at Berkeley. He received the Dipl.Ing. and M.Sc. degrees in electrical engineering from the University of Belgrade, Yugoslavia, in 1992 and 1994, respectively, and the Ph.D. degree from the University of California at Davis in 1999. His research activities within C2S2 include high-speed and low-power digital integrated circuits, finFET-based circuits, and analog circuit design is scaled technologies. He is co-author of the book Digital Integrated Circuits: A Design Perspective, 2nd ed, Prentice-Hall, 2003, and a Scientific Co-Director of the Berkeley Wireless Research Center. For his C2S2-sponsored work he received the Best Paper Award at the ACM/IEEE International Symposium of Low-Power Electronics in 2005, and the 2004 Jack Kilby Award for the Outstanding Student Paper at the IEEE International Solid-State Circuits Conference.

Michael Orshansky is an Assistant Professor at the Department of Electrical and Computer Engineering at The University of Texas at Austin. He received Ph.D. in electrical engineering in 2001 from the University of California at Berkeley. His research interests include circuit design and analysis techniques for manufacturability, statistical CAD algorithms for yield improvement, low-power IC design, and modeling of semiconductor devices. He is the recipient of the National Science Foundation CAREER award for 2004, and Best Paper awards in Transactions on Semiconductor Manufacturing in 2004, and at DAC 2005 and ISQED 2006.

Sanjay J. Patel is an Associate Professor of Electrical and Computer Engineering and Willett Faculty Scholar at the University of Illinois at Urbana-Champaign. He earned his BS (1990), MS (1992) and Ph.D. (1999) in Computer Science and Engineering from the University of Michigan, Ann Arbor. He is co-author (with Yale N. Patt of UT-Austin) of "Introduction to Computing Systems: From Bits and Gates to C and Beyond." His research interests include processor microarchitecture, computer architecture, and high-performance and reliable computer systems. Through the Advanced Computing Systems Group, he investigates high-performance and error-tolerant processor architectures. He and his group are developing key instruction optimization technology for next-generation high-performance microprocessors. Patel has published over 30 articles and papers in the area. He has served on the research staffs at Digital Equipment Corporation, Intel, and HAL Computer Systems, and has consulted for Transmeta, JPL, HAL, Intel, and AGEIA Technologies, where he served as Chief Architect in 2006-2006.

Michael H. Perrott received the B.S. degree in Electrical Engineering from New Mexico State University, Las Cruces, NM in 1988, and the M.S. and Ph.D. degrees in Electrical Engineering and Computer Science from Massachusetts Institute of Technology in 1992 and 1997, respectively. From 1997 to 1998, he worked at Hewlett-Packard Laboratories in Palo Alto, CA, on high speed circuit techniques for Sigma-Delta synthesizers. In 1999, he was a visiting Assistant Professor at the Hong Kong University of Science and Technology, and taught a course on the theory and implementation of frequency synthesizers. From 1999 to 2001, he worked at Silicon Laboratories in Austin, TX, and developed circuit and signal processing techniques to achieve high performance clock and data recovery circuits. He is currently an Associate Professor in Electrical Engineering and Computer Science at the Massachusetts Institute of Technology, and focuses on high speed circuit and signal processing techniques for data links and wireless applications.

Lawrence Pileggi began his career as a designer, first doing biomedical microelectronics design at the Foundation for Science and Technology in Pittsburgh, PA, then as an integrated circuit and system designer at Westinghouse Research and Development. During his two years at Westinghouse he acquired two patents and in 1986 received the corporation's highest engineering achievement award for the designing the first low-voltage elevator controller. Later that year he became a graduate student at Carnegie Mellon. His Ph.D. work, Asymptotic Waveform Evaluation for Timing Analysis (AWE), was the first to apply Pade' approximations for model order reduction of RLC interconnect circuits. Since graduating from Carnegie Mellon in 1989, he was a faculty member at The University of Texas at Austin, and is currently the Tanoto professor of Electrical and Computer Engineering and director of the Center for Silicon System Implementation at Carnegie Mellon. He and his students have been actively involved in all aspects of circuit-level modeling, design, and design automation. One notable work was the development of the RICE tool that is used commercially all over the world for RLC interconnect analysis. He has received a number of awards for his teaching and research, including the 1991 and 1999 Best CAD Transactions Paper Award, a 2003 DAC best paper award, an NSF Presidential Young Investigator Award, SRC Technical Excellence Awards in 1992 and 1999, an SRC Invention Award in 1993, The University of Texas Parent's Association Centennial Teaching Fellowship in 1994, and a Faculty Partnership Award from IBM in 1995. Professor Pileggi has served as a consultant and Technical Advisory Board member for various EDA and semiconductor companies. He helped found Extreme Design Automation, Fabbrix, and Xigmix.

Ada S. Y. Poon received the Ph.D. degrees in Electrical Engineering and Computer Sciences from the University of California at Berkeley in 2004. From 2003 to 2005, she was a senior research scientist at Intel Corporation, Santa Clara, where she researched on VLSI architecture for flexible radios. Currently, she is an assistant professor at the Department of Electrical and Computer Engineering in the University of Illinois at Urbana-Champaign. Her research interests are information theory, wireless communication, and integrated circuits.

David Ricketts received the PhD in EE from Harvard in 2006, and subsequently joined the faculty at Carnegie Mellon. He is currently an Assistant Professor of ECE. He has 12 years prior industrial experience in the development of over 40 integrated circuits in mixed-signal, RF and power management applications. At Harvard he developed a range of novel circuit topologies, including a new nonlinear wave based oscillator that was featured in NatureÕs News and Views (2006) and was selected for the 2008 McGraw Hill Yearbook of Science and Engineering. In addition he helped develop the fastest SiGe nanowire ring oscillator on glass in collaboration with the Lieber group which was published in Nature (2005). He has extensive expertise in oscillator circuit design and phase noise optimization. He was a Harvard Innovation Fellow (2005) and has won several awards, most recently the 2006 Analog Devices Outstanding Student Designer Award for his thesis work at Harvard.

Kaushik Roy is the Roscoe H. George Professor of ECE at Purdue University. His research interests include VLSI design for nano-scale Silicon and non-Silicon technologies, ultralow-power electronics, process-tolerant design, and VLSI testing and verification. He has published more than 350 papers in refereed journals and conferences, holds 8 patents, and is co-author of two books. Kaushik received the NSF CAREER award, IBM faculty award, ATT/Lucent Foundation award, 2005 SRC Technical Excellence Award, SRC Inventors Award, and several best paper awards. He is the Chief Technical Advisor of Zenasis Inc. and is a fellow of IEEE.

Rob Rutenbar received the Ph.D. from the University of Michigan in 1984, and then joined the faculty at Carnegie Mellon University (CMU), where he is currently the Stephen J. Jatras (E'47) Professor of Electrical and Computer Engineering. He has worked on analog synthesis technology for nearly 20 years. From 1993 to 1998 he was Director of the Center for Electronic Design Automation (CEDA) in ECE at CMU. He has worked on custom circuit design technology for over 20 years. In 1998, on a leave of absence from CMU, he co-founded Neolinear, Inc., and served as its Chief Scientist until its acquisition by Cadence Design Systems in 2004. He is the founding Director of the US national C2S2 focus center, a consortium of 17 universities, chartered by the US semiconductor industry and DARPA to work on next-generation circuit design challenges. Prof. Rutenbar has won many different awards: he is the 2001 co-winner of the Semiconductor Research Corporation Aristotle Award for excellence in education and, most recently, the 2007 IEEE Circuits and Systems Industrial Pioneer Award, for his work in making analog synthesis tools commercially successful. His work has been featured in venues ranging from EETimes to the Economist magazine. He is a Fellow of the IEEE.

T.E. Schlesinger is Professor and Head of Electrical and Computer Engineering at Carnegie Mellon University. He received his B.Sc. degree in Physics from the University of Toronto in 1980 and his M.S. and Ph.D.
degrees in Applied Physics from the California Institute of Technology in 1982 and 1985, respectively. His research interests are in the areas of solid state electronic and optical devices, nanotechnology, and information storage systems. Professor Schlesinger was the founding co-director of the General Motors Collaborative Research Laboratory at CMU and was Director of the Data Storage Systems Center prior to becoming head of ECE. His work and the work of his students is of direct interest to a number of industrial partners, and he has received a number of awards and honors, including: 1999 and 1998 R&D 100 Awards for his work on nuclear detectors and electro-optic device technology and the Carnegie Science Center 1998 "Scientist" award. In 1988 he received the George Tallman Ladd Award for research, and in 2001 he received the Benjamin Richard Teare Award for teaching from the Carnegie Institute of Technology. He has published over 250 archival journal publications, keynote, invited, and contributed conference presentations, and holds ten patents. He is a Fellow of the SPIE.

Ken Shepard is an associate professor at Columbia Univ. He received the B.S.E. from Princeton in 1987 (valedictorian/Phi Beta Kappa); and the M. S. and Ph. D. degrees in electrical engineering from Stanford in 1988 and 1992, respectively. His Ph. D. research focused on the physics of nanoscale devices. He was awarded the Hertz Foundation doctoral thesis prize in 1992. In the VLSI Design Department at IBM T. J. Watson Research Center, he was responsible for the design methodology for IBM's first high-performance microprocessors for the S/390 mainframe ( Alliance project) and received IBM Research Division Awards in 1995 and 1997. He co-founded CadMOS Design Technology, an EDA start-up which pioneered PacifIC and CeltIC, the first tools for large-scale signal integrity analysis of digital integrated circuits. Cadence acquired CadMOS in 2001. Current research interests include design tools for advanced CMOS technology, including the CAD work in SOI circuits and extraction approaches for inductance that are being commercialized by Cadence. He and his students are also working on on-chip test and measurement circuitry, on-chip sampling oscilloscopes, low-power design techniques for digital signal processing, circuits for low-power intrachip communications, and CMOS gene chips. He received the NSF CAREER Award in 1998, Columbia’s Distinguished Faculty Teaching Award in 1999, and several best paper awards.

Charles Sodini received his B.S. from Purdue in 1974, and his M.S. and Ph.D. from UC-Berkeley in 1981 and 1982, respectively. He was a member of the technical staff at HP Labs from 1974 to 1982, where he worked on the design of MOS memory and later on the development of MOS devices with very thin gate dielectrics. He joined the MIT faculty in 1983, where he is a Professor of Electrical Engineering and Computer Science. His research interests include integrated circuit and system design with emphasis on analog, RF and memory circuits and systems. He has also been exploring circuits using organic devices. He is co-author of an undergraduate text on integrated circuits and devices, Microelectronics: An Integrated Approach. After studying the Hong Kong electronics industry, he co-authored a chapter in Made by Hong Kong and participated in MIT's globalization study, resulting in a book entitled How We Compete. He held the Analog Devices Career Development Professorship at MIT and was the Associate Director of MIT's Microsystems Technology Laboratories from 1989-1996. He is an IEEE Fellow and has served on a variety of IEEE Conference Committees, including General Chair of the International Electron Device Meeting in 1989. He was the Technical Program Co-Chairman for the 1992 Symposium on VLSI Circuits and the 1993-1994 Co-Chair. He is currently the Chair of VLSI Symposia Executive Committee. He served on the Electron Device Society Administrative Committee from 1988-94, is past president of the Solid-State Circuits Society, and a member of its Administrative Committee.

Andrzej J. Strojwas is the Joseph F. and Nancy Keithley Professor in Electrical and Computer Engineering at Carnegie Mellon University. He joined CMU in 1983 after earning his Ph.D. from CMU in 1982 and his MS in 1976 from the Technical University of Warsaw, both in Electrical Engineering. His graduate work resulted in the statistical process and device simulator, FABRICS, which was quickly adopted by leading U.S. semiconductor manufacturers at a time when foreign competition threatened their survival. He is a pioneer and internationally recognized leader in the field of design for manufacturability of integrated circuits. In 1990 he became the founding co-director of the Center of Excellence for Rapid Yield Learning, one of only a few such centers established at top universities by SEMATECH, a consortium of U.S. Semiconductor manufacturers and the U.S. government. He is co-founder of pdF Solutions, Inc., which commercializes manufacturability methodology and software developed at CMU. He has won several Best Paper and Inventor Recognition Awards. He is a Fellow of the IEEE, and received the Golden Jubilee Medal for outstanding service to IEEE Circuits and Systems Society. In 1993 he was conferred the title of State Professor by the president of his native Poland.

H.-S. Philip Wong is a Professor of Electrical Engineering at Stanford University. He completed his PhD in 1988 at Lehigh University. He joined Stanford in 2004 (www.stanford.edu/~hspwong) after 16 years at IBM Research, with appointments as research staff member, Manager, and Senior Manager. While at IBM, he was responsible for shaping and executing IBM’s strategy on nanoscale science and technology and silicon technology. His interests are in the area of nanoscale science and technology, semiconductor technology, solid-state devices, and electronic imaging. He is interested in exploring new materials, novel fabrication techniques, and novel device concepts for future nanoelectronics systems. Novel devices often require new concepts in circuit and system designs. His research also includes explorations into circuits and systems that are device-driven. He is a Fellow of the IEEE.

Gregory W. Wornell received the B.A.Sc. degree (with honors) from the University of British Columbia, Canada, and the S.M. and Ph.D. degrees from the Massachusetts Institute of Technology, all in Electrical Engineering and Computer Science, in 1985, 1987 and 1991, respectively. Since 1991 he has been on the faculty at MIT, where he is Professor of Electrical Engineering and Computer Science. At MIT he leads the Signals, Information, and Algorithms Laboratory within the Research Laboratory of Electronics, and co-directs the MITCenter for Wireless Networking. He is also chair of Graduate Area I (Systems, Communication, Control, and Signal Processing) within the EECS department's doctoral program, and a member of the MIT Computational and Systems Biology Initiative.  He has held visiting appointments at the Department of Electrical Engineering and Computer Science at the University of California, Berkeley, CA, in 1999-2000, at Hewlett-Packard Laboratories, Palo Alto, CA, in 1999, and at AT&TBell Laboratories, Murray Hill, NJ, in 1992-3. His research interests and publications span the areas of signal processing, digital communication, and information theory, and include algorithms and architectures for wireless and sensor networks, broadband systems, and multimedia environments. He has been involved in the Signal Processing and Information Theory societies of the IEEE in a variety of capacities, and maintains a number of close industrial relationships and activities.  He has won a number of awards for both his research and teaching, and is a Fellow of the IEEE.

Chih-Kong (Ken) Yang received the B.S. and M.S. degrees in electrical engineering and the Ph.D. degree from Stanford University in 1992 and 1998, respectively.  He joined the UCLA Electrical Engineering Department in 1999 and is the Faculty Adviser of the HSSEAS Student Chapter of IEEE. His research interests are primarily in the area of high-performance digital and mixed-signal circuit design. Current research areas include the design of high-speed data and clock recovery circuits for large digital systems (6-10Gb/s), design of low-power, high-performance functional blocks and clock distribution for high-speed digital processing, and low-power high-precision capacitive sensing interface design for MEMs applications.

Patrick Yue received his Ph.D. and M.S. degrees in electrical engineering from Stanford University in 1998 and 1994, respectively, and his B.S. degree from the University of Texas at Austin in 1992. Since July 2006, he has been an Associate Professor in the Department of Electrical and Computer Engineering at University of California, Santa Barbara. From November 2003 to June 2006, he was with Carnegie Mellon University as an Assistant Professor in ECE, where he continues to serve as adjunct faculty. His current interests include high-speed CMOS analog design, cell-based RF/mm-wave CAD methodology and integrated biomedical sensors. From 2001 to 2003, Dr. Yue was a Consulting Assistant Professor in Stanford's EE Department. From 1998 to 2002, he assisted in founding Atheros Communications, where he was instrumental to developing the first 802.11a CMOS transceiver. In 2002, he joined Aeluros, another Silicon Valley startup, to work on signal integrity and device modeling issues for 10-Gbps I/Os. Prof. Yue has contributed to over 50 technical papers, two book chapters and 11 U.S. patents. He was the co-recipient of the 2003 ISSCC Jack Kilby Best Student Paper Award for demonstrating the first on-chip standing-wave clock distribution network. His 1998 paper titled "On-chip spiral inductors with patterned ground shields for Si-based RF ICs" is among the 38 all-time Top Cited Articles in IEEE Journal of Solid-State Circuits. He is a committee member of RFIC Symposium (RFIC) the Asian Solid-State Circuit Conference (A-SSCC), International Symposium on Low Power Electronics and Design (ISLPED), and IEEE Electron Devices Society VLSI Technology and Circuits Committee. Prof. Yue is a member of the Tau Beta Pi Honor Society.

Jiang-Gang (Jimmy) Zhu received the PhD in Physics from UCSD in 1989. He joined Carnegie Mellon in 1997, where he is Director of the Data Storage Systems Center, holds the ABB Chair in ECE, as well as courtesy appointments in Material Science and Engineering and Physics. His research on the microstructure of recording media has been pivotal for hard disk drives to reach todayÕs densities. He pioneered micromagnetic modeling for MRAM memory design, in the process establishing many of todayÕs fundamental design principles. His fundamental patent on the CPP/GMR read sensor won a ÒTop 100 InventionsÓ from R&D Magazine in 1996. He has authored roughly 200 papers and holds 12 U.S. patents. He is a Fellow of the IEEE.